Many semiconductor device testing apparatus (commonly called IC tester), which measures the electrical characteristics of semiconductor integrated circuits (which will be referred to as ICs hereinafter) by applying a test signal of a predetermined pattern to the ICs being tested, have a semiconductor device transporting and processing or handling apparat us (commonly called handler) integrally connected thereto for transporting the ICs to be tested (ICs under test) to a test section where they are brought into electrical contact with a socket of the test head (a measuring section of the semiconductor device testing apparatus for applying and receiving various testing electrical signals), followed by carrying the tested ICs out of the test section and sorting them out into conforming and non-conforming articles on the basis of the data of the test results. The testing apparatus having the handler of the type described above integrally connected thereto is also herein termed "semiconductor device testing apparatus". In the following disclosure the present invention will be described by taking ICs typical of semiconductor devices by way of example for the convenience of explanation.
First, an example of the prior art handler called "horizontal transporting system" will be described with reference to FIG. 7. The handler 10 illustrated therein comprises a loader section 11 where ICs 15 to be tested which have been beforehand loaded on a customer tray (user tray) 13 by a user are transferred and reloaded onto a test tray 14 capable of withstanding high/low temperatures, a constant temperature chamber 20 including a test section 21 for receiving and testing the ICs transported from the loader section 11, and an unloader section 12 where the tested ICs 15 which have been carried on the test tray 14 out of the constant temperature chamber subsequently to undergoing a test in the test section 21 are transferred from the test tray 14 to the customer tray 13 to be reloaded on the latter (generally, the tested ICs are often sorted by categories based on the data of the test results and transferred onto the corresponding customer trays).
The test tray 14 is moved in a circulating manner from and back to the loader section 11 sequentially through the constant temperature chamber 20 and the unloader section 12. More specifically, the test tray 14 loaded with ICs 15 to be tested is transported from the loader section 11 to a soak chamber 22 within the constant temperature chamber 20 where the ICs 15 placed on the tray 14 are heated or cooled to a predetermined constant temperature. Generally, the soak chamber 22 is configured to store a plurality of (say, ten) test trays 14 stacked one on another such that a test tray 14 newly received from the loader section 11 is stored at the top of the stack while the lowermost test tray of the stack is delivered to the test section 21 in the constant temperature chamber 20, for example. The ICs 15 to be tested are heated or cooled to a predetermined constant temperature while the test tray 14 is moved sequentially from the top to the bottom of the stack within the soak chamber 22, so that the ICs 15 are loaded with temperature stresses of either a designed high or low temperature.
The ICs 15 heated or cooled to the constant temperature together with the test tray 14 are then transported while maintained at that temperature from the soak chamber 22 to the test section 21 where the ICs under test while remaining loaded on the test tray 14 are brought into electrical contact with an IC socket or sockets (not shown) disposed in the test section 21 to be measured for their electrical characteristics. Upon completion of the test, the tested ICs 15 together with the test tray 14 are transported from the test section 21 to an exit chamber 23 where the ICs 15 are restored to the ambient temperature.
Like the soak chamber 22, the exit chamber 23 is also configured to accommodate test trays in the form of a stack. For example, the arrangement is such that the tested ICs 15 are brought back to the ambient temperature as the associated test tray is moved sequentially from the bottom to the top of the stack within the exit chamber 23. Thereafter, the tested ICs 15 as carried on the test tray 14 are passed to the unloader section 12 where the tested ICs are sorted by categories based on the test results and transferred onto the corresponding customer trays 13. The test tray 14 emptied in the unloader section 12 is delivered back to the loader section 11 where it is again loaded with ICs 15 to be tested from the customer tray 13 to repeat the same steps of operation.
It is to be noted here that the transfer of ICs already tested as well as of ICs to be tested between the customer tray 13 and the test tray 14 is typically effected by suction transport means utilizing a vacuum pump which may pick up one to several ICs at a time for the transfer. In the loader section 11 the customer tray 13 is moved by the associated transfer arm 30 to a transfer position where ICs 15 to be tested are transferred from the customer tray 13 to the test tray 14, while in the unloader section 12 the customer tray 13 is moved by the associated transfer arm 30 to a receiving position to receive the tested ICs 15 from the test tray 14.
As discussed above, ICs 15 to be tested are carried on a test tray 14 from the loader section 11 to the test section 21 from where they are transported while carried on the test tray to the unloader section 12 after having undergone the test. In the test section 21, ICs under test are brought, while remaining placed on the test tray, into electrical contact with IC sockets which are supplied with a signal of a predetermined test pattern from the semiconductor device testing apparatus (hereinafter, referred to as IC tester), whereby the ICs are tested for their electrical characteristics. The test section 21 of the handler is disposed in the constant temperature chamber 20 since it needs to conduct the test on ICs 15 under test under an atmosphere of a designated temperature. The IC socket or sockets mounted to the test head need also be disposed in an adiabatic condition within the constant temperature chamber 20.
FIG. 8 illustrates an example of the construction of the test tray 14. The test tray 14 comprises a rectangular frame 16 having a plurality of (three in the illustrated example) equally spaced apart parallel cleats 17 extending longitudinally of the frame between the opposed longitudinal side frame members 16a and 16b of the frame. Each of the cleats 17 has a plurality of equally spaced apart mounting lugs 18 protruding therefrom on both sides thereof, and likewise each of the longitudinal side frame members 16a, 16b opposing the adjacent cleats has similar mounting lugs 18 protruding therefrom. The mounting lugs 18 protruding from each cleat 17 on both sides thereof are located such that each of the mounting lugs 18 protruding from the cleat 17 on one side thereof is positioned in the middle between two corresponding mounting lugs 18 protruding from that cleat 17 on the opposite side thereof. Likewise, each of the mounting lugs 18 protruding from the longitudinal side frame members 16a, 16b are located in the middle between two corresponding mounting lugs 18 protruding from the corresponding opposed cleats 17. A number of device receiving carriers 24 (which are known as tray inserts in the art) are accommodated in a juxtaposed relation in each of storage spaces defined between a pair of opposed cleats 17 and between one of the cleats and either one of the opposed longitudinal side frame members 16a, 16b.
Each device receiving carrier 24 is accommodated in one carrier compartment 19 in each of the storage spaces which compartment is defined by a rectangular lot containing two mounting lugs 18 at two diagonally opposite corners thereof. In the illustrated example, since each of the cleats 17 has sixteen mounting lugs 18 on each side thereof, sixteen carrier compartments 19 are defined in each of the storage spaces so that sixteen device receiving carriers 24 may be mounted in each storage space. In the illustrated example in which there are four such storage spaces, sixty-four (16.times.4) device receiving carriers 24 in total may be mounted in one test tray 14. Each device receiving carrier 24 is secured to two mounting lugs 18 by means of fasteners 28, for example.
Each of device receiving carriers 24 is of identical shape and size in its exterior contour and has an IC pocket 25 formed in the center for accommodating an IC to be tested therein. In this example, the IC pocket 25 is in the shape of a generally square recess. The shape and size of the IC pocket 25 are determined depending on those of the particular IC to be tested. It is for this reason that device receiving carriers 24 having various shapes and sizes are prepared and are in stock so that it is possible to exchange one type of device receiving carrier 24 for another having a corresponding shape and size to accommodate any particular shape and size of ICs whenever the type of ICs to be tested is changed.
The exterior of the device receiving carrier 24 is sized so as to loosely fit in the space defined between the opposed mounting lugs 18 of the carrier compartment 19. The device receiving carrier 24 has flanges extending from its opposed ends adapted to rest on the corresponding mounting lugs 18, these flanges having mounting holes 26 formed adjacent the lateral sides thereof for receiving the fasteners 28, and apertures 27 formed in the center for passing locating pins therethrough. FIG. 9 illustrates the device receiving carriers 24 mounted in the test tray 14 of the construction described above.
ICs 15 to be tested are each loaded on one of the device receiving carriers 24 in the test tray 14 as illustrated in FIG. 8 to be carried from the loader section 11 to the test section 21 in the constant temperature chamber 20 where they are brought, while remaining placed on the test tray, into electrical contact with the IC sockets mounted on the test head to be tested for their electrical characteristics.
Shown in FIG. 10 is an example of IC sockets mounted on the test head when the test tray 14 of the construction shown in FIG. 8 is employed. This example illustrates an array of IC sockets 60 arranged in a matrix of four rows (lateral rows).times.eight columns (longitudinal rows). While the number of the rows of IC sockets 60 in this array is equal to that of the device receiving carriers 24 mounted in the test tray 14, the number of the columns of IC sockets is one half (1/2) of the number of the columns of the device receiving carriers 24. The reason is that the number of ICs that can be tested at one time in one IC tester is limited, so that it is difficult to test as many ICs as sixty-four at one time.
Accordingly, for the test tray 14 having the construction shown in FIG. 8, since device receiving carriers 24 are arranged in a matrix of four rows.times.sixteen columns, thirty-two (4.times.8) IC sockets 60 are mounted in the test head so as to be able to test all of the ICs in every other column in every row (lateral row) at one time in the test tray 14 as shown in FIG. 10 where the IC tester is configured to test thirty-two ICs at a time. More specifically, thirty-two (4.times.8) IC sockets 60 are arranged such that they will be placed into electrical contact with thirty-two (4.times.8) ICs in total located in the first, third, fifth, seventh, ninth, eleventh, thirteenth and fifteenth columns in every row, when the test tray 14 has been transported to the test head.
As illustrated in FIG. 11, the first run of test is conducted on the thirty-two ICs 15 (shown cross-hatched) located in the first, third, fifth, seventh, ninth, eleventh, thirteenth and fifteenth columns in every row in individual device receiving carriers 24, and the second run of test is effected on the other thirty-two ICs 15 located in the second, fourth, sixth, eighth, tenth, twelfth, fourteenth and sixteenth columns in every row by shifting the test tray 14 by a distance corresponding to one transverse width of the device receiving carrier 24.
In the case where the IC tester is equipped with sixteen (4.times.4) IC sockets 60 so as to be able to test sixteen ICs in every fourth column in every row in the test tray 14 all at once, the first run of test is conducted on the sixteen ICs in total located in the first, fifth, ninth and thirteenth columns in every row, the second run of test is effected on another sixteen ICs placed in the second, sixth, tenth and fourteenth columns in every row by shifting the test tray 14 by a distance corresponding to one transverse width of the device receiving carrier 24, the third run of test is similarly carried out on yet another sixteen ICs in the third, seventh, eleventh and fifteenth columns in every row by further shifting the test tray 14 by a distance corresponding to one transverse width of the device receiving carrier 24, and finally the fourth run of test is done on the final sixteen ICs in the fourth, eighth, twelfth and sixteenth columns in every row by further shifting the test tray 14 by a distance corresponding to one transverse width of the device receiving carrier 24, whereby all of the sixty-four ICs arrayed in four rows.times.sixteen columns may be tested.
It should be noted that when testing ICs housed in multi-pin packages, such IC packages are transferred from a customer tray 13 and loaded onto a test tray 14 as shown in FIG. 8 in the loader section 11 and then transported to the test section 21 where they are tested while remaining placed on the test tray. Such ICs housed in multi-pin packages include an IC housed in the ball grid array package (as will be referred to as BGA package hereinafter) of the type in which a semiconductor device (IC) is mounted on the upper surface of an insulation substrate of ceramic, plastic or the like with minute solder balls serving as terminals or electrodes being arranged on the undersurface of the substrate in a two-dimensional grid array; an IC housed in QFP (Quad Flat Package) of the surface mount type comprising a thin square or rectangular package body having lead pins protruding horizontally and parallel to each other from its four sides; and an IC housed in TSOP (Thin Small Outline Package) of the surface mount type comprising a thin rectangular package body having lead pins protruding horizontally and parallel to each other from its two opposed sides. Further, TSOP refers to SOP (Small Outline Package) having a package mounting height lower than 1.27 mm. It is also to be understood that the lead pins of the QFP and TSOP are formed in the shape of a gull wing and soldered to the electrode of the printed circuit board.
In the test section 21, the lead pins of IC packages carried on a test tray 14 are brought into electrical contact with IC sockets 60 mounted on the test head, followed by applying the IC sockets 60 with test signals of a predetermined pattern from the IC tester through a performance board attached to the test head to conduct the test on the ICs in the IC packages. The response signals from the ICs in the IC packages are transmitted to the IC tester body (main frame) through IC sockets 60 and the performance board to measure the electrical characteristics of the ICs.
In the case of BGA package, a multiplicity of grid-arrayed ball terminals 41 on the undersurface of the BGA package 40 placed in a device receiving carrier 24 in a test tray 14 are electrically contacted with the corresponding socket terminals 61 of an IC socket 60 in the test section 21, as shown in FIG. 12. In order to insure electrical contact between the ball terminals 41 and the socket terminals 61, a pusher 80 for pushing and holding the BGA package 40 down is mounted above the test head. The pusher 80 is configured to push the associated BGA package 40 accommodated in each device receiving carrier 24 from above down to positively put the ball terminals 41 into electrical contact with the opposing socket terminals 61 of the IC socket 60.
The device receiving carrier 24 mounted in the test tray 14 holds the BGA package 40 in place with the ball terminals 41 of the package exposed downwardly through the underside of the carrier while the test tray 14 is moved from the loader section 11 through he test section 21 to the unloader section 12. Due to the ball terminals 41 being disposed in a grid-like array on the substantially entire area of the undersurface of the BGA package 40, the device receiving carrier 24 needs to be formed through its bottom with a generally rectangular socket terminal access opening 243 having a considerably wide area as shown in FIG. 13 in order to permit all of the ball terminals 41 to contact with the socket terminals 61 of the IC socket 60. Consequently, as will be appreciated from FIG. 13, the bottom wall area 241 of the device receiving carrier 24 is greatly reduced with only the marginal wall portions 241 (primarily on the opposite longitudinal sides) left for carrying and supporting the BGA package 40 thereon.
Since the undersurface of the BGA package 40 generally has small areas left around its periphery on which no ball terminal 41 is disposed, the BGA package 40 can narrowly be retained by resting the left-over small peripheral areas on the marginal bottom wall portions 241 of the device receiving carrier 24. In recent years, however, BGA packages having ball terminals 41 disposed across the entire area of the undersurface have been manufactured. If such BGA packages are rested on the device receiving carrier 24 of the construction described above, some of the ball terminals would not be exposed out through the socket terminal access opening 243, resulting in inability to effect the test of the IC while remaining loaded on the device receiving carrier 24.
The bottom wall area 241 of the device receiving carrier 24 has thus had little area left for carrying and supporting the BGA package thereon due to the increase in number of lead pins with an enhancement in the integration level of the IC housed in the BGA package.
It will thus be appreciated that the IC tester of the above described construction adapted to conduct the test on the IC as carried on the test tray 14 could not be employed for the BGA package unless some or other means were developed for supporting the BGA package on the device receiving carrier 24.
In the case of QFP package, a multiplicity of lead pins 46 extending parallel from the four sides of the QFP 45 placed in a device receiving carrier 50 in a test tray 14 are electrically contacted with the corresponding socket terminals 66 of an IC socket 65 in the test section 21, as shown in FIG. 14. In order to insure electrical contact between the lead pins 46 and the socket terminals 66, the test head is equipped thereabove with a pusher 82 for pushing the lead pins 46 extending parallel from the four sides of the QFP 45 rested on each device receiving carrier 50 from above down against the opposing socket terminals 66 of the IC socket 65.
The device receiving carrier 50 mounted in the test tray 14 holds the QFP package 45 in place with the lead pins 46 extending parallel from the four sides of the QFP 45 exposed downwardly through the underside of the carrier. Because of the increase in number of lead pins provided in the QFP 45, it is seen in FIG. 15 that the lead pins 46 are formed along the four sides of the package 45 (rectangular in this example) up to the opposite ends of the respective sides (up to the vicinities of the respective corners).
As is seen from FIG. 15, four socket terminal access slits 52 are formed in the bottom wall 51 of the device receiving carrier 50 along the four sides of the QFP 45 to permit all of the lead pins 46 to contact with the socket terminals 66 of the IC socket 65 such that the opposite ends of each slit extends very close to the ends of the adjacent slit, leaving only narrow joint solid portions between the ends of the adjacent slits. As a result, as is appreciated from FIG. 15, the central rectangular bottom wall area 51 of the device receiving carrier 50 for carrying and supporting the QFP 45 is connected by the aforesaid narrow joint portions with peripheral bottom wall portion of the device receiving carrier 50, leading to the disadvantages that not only the mechanical strength of the bottom wall area 51 of the device receiving carrier 50 for carrying the QFP 45 is substantially reduced, but also the mechanical strength of the device receiving carrier 50 per se is reduced.
It is to be noted here that testing high speed ICs requires to apply high frequency signals, which in turn requires to reduce the thickness of the IC socket as much as possible. Such reduced thickness of the IC socket further aggravates the difficulty in forming the device receiving carrier 24 with a bottom wall for resting an IC package such as BGA package thereon as well as the problem of the reduced mechanical strength of the bottom wall area of the device receiving carrier 50.
As was discussed before with reference to FIG. 7, ICs (actually, packages housing ICs) 15 being tested as transferred onto the test tray 14 in the loader section 11 are transported into the constant temperature chamber 20 where they are heated or cooled to a predetermined constant temperature and then passed to the test section 21 within the constant temperature chamber 20 where the ICs while maintained at that predetermined temperature and carried on the test tray 14 are subjected to the testing. Upon completion of the testing, the tested IC packages 15 loaded on the test tray 14 are transported together with the test tray 14 out of the constant temperature chamber 20.
On the other hand, whenever the type of the IC package to be tested is changed, the IC socket with which the terminals such as ball terminals 41 or lead pins 46 of the IC package are electrically contacted is changed correspondingly. It is not easy, however, to carry out such exchange operation, as will be explained below.
The IC sockets 60, 65 of the IC tester are mounted in the performance board of the test head which is in turn disposed in the bottom of the constant temperature chamber 20. The IC sockets 60, 65 are fixed in position such that the upper portions of the IC sockets including the socket terminals are exposed in the constant temperature chamber 20 so as to be able to conduct the test on the ICs while maintained at a predetermined temperature (see FIG. 6). Consequently, to change the IC sockets 60, 65 requires first to withdraw the IC sockets from the constant temperature chamber 20, followed by removing the IC sockets fixed in a board to replace them by another type of IC sockets.
However, withdrawal of the IC sockets 60, 65 from the constant temperature chamber 20 opens the bottom of the chamber maintained at a predetermined temperature to allow the ingress of the outside air thereinto, resulting in either lowering or raising the temperature in the chamber. It will thus be appreciated that when the type of the IC package to be tested has been changed, it is required to reset the temperature in the constant temperature chamber 20 at a predetermined temperature, in addition to first replacing the IC sockets and then presenting the test head back to the chamber so as to expose the upper portions of the new IC sockets including the socket terminals to the interior of the constant temperature chamber 20. Accordingly, a substantial amount of time and troublesome operations have been required before the testing of the new type of ICs may be resumed, undesirably resulting in the need for quite a long testing time.